RP115 Series
Low Voltage 500mA/1A LDO Regulator
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Description
The RP115 Series are CMOS-based LDO regulators featuring 500mA/1A output. In the RP115L (DFN1216-8, DFN2020-8B), there are two preset inrush current limit and guaranteed maximum output current values and alternative by the logic of LCON pin. When LCON pin is set "H", the maximum IOUT=1A and IRUSH=500mA, while LCON pin is set "L", the maximum IOUT=500mA and IRUSH=300mA. (As for the RP115H (SOT-89-5), the preset inrush current limit and output current value is fixed at the maximum IOUT=1A and IRUSH=500mA.) By this function, for example, in case the RP115L is turned on with setting LCON at "L" (the preset IRUSH=300mA) and after the start up sequence, by making LCON pin at "H" (IOUT=1A), then inrush current can be suppressed less only at start-up. RP115 supports low voltage, featuring input voltage from 1.4V and output voltage from 0.7V. Due to a built-in Nch. transistor with low on-resistance, RP115 provides a low dropout voltage. Ripple rejection is 75dB and noise is low. In addition to a fold-back protection circuit built into conventional regulators, RP115 contains a thermal shutdown circuit, an inrush current limit circuit, a constant slope circuit, and a reverse protection circuit. In addition to SOT-89-5, RP115 is offered in a 1.6mm×1.2mm square DFN1216-8 package for consumer and industrial applications and a DFN2020-8B package for automotive application.
Spec
Standard | Industrial | Automotive | |
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Input Voltage Range | 1.4 V to 5.25 V (6.0 V) | ||
Operating Temperature Range | -40°C to 85°C (125°C) | -40°C to 105°C (150°C) | -40°C to 105°C (150°C) |
Supply Current | Typ. 110 µA | ||
Standby Current | Typ. 0.5 µA | ||
Output Voltage Range | 0.7 V to 4.3 V (0.1 V step) | 0.9 V, 1.0 V, 1.1 V, 1.2 V, 1.35 V, 1.5 V, 1.75 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 3.4 V | 0.9 V, 1.0 V, 1.1 V, 1.2 V, 1.25 V, 1.35 V, 1.5 V, 1.75 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 3.4 V, 3.9 V |
Output Voltage Accuracy | ±1.0% (Ta = 25℃, VSET ≥ 1.75V) | ||
Output Voltage Temperature Coefficient | Typ. ±30 ppm/°C (VSET ≥ 1.75 V) | Typ. ±30 ppm/°C (VSET ≥ 1.75 V) Typ. ±100 ppm/°C (VSET < 1.75 V) |
Typ. ±30 ppm/°C (VSET ≥ 1.75 V) Typ. ±100 ppm/°C (VSET < 1.75 V) |
Dropout Voltage | Typ. 0.195 V (RP115L: IOUT = 1.0 A, VSET = 1.2 V) Typ. 0.235 V (RP115H: IOUT = 1.0 A, VSET = 1.2 V) |
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Ripple Rejection | Typ. 80 dB (f = 1 kHz, VSET ≤ 1.8 V) Typ. 75 dB (f = 1 kHz, VSET > 1.8 V) |
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Package | DFN1216-8, SOT-89-5 | DFN1216-8, SOT-89-5 | DFN2020-8B, SOT-89-5 |
Protections / Functions
TSD | Reverse | Current Limit | ISC | Inrush | ECO mode | Auto Discharge | External Driver | PGOOD | Soft Start |
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Functional Description
TSD | Thermal Shutdown Function |
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Reverse Current Protection | Reverse Current Protection |
Current Limit | Overcurrent Protection |
ISC | Short Current Protection |
Inrush Current Limit | Inrush Current Protection |
Constant Slope | Constant Slope Function |
ECO mode | ECO Function |
Auto Discharge | Auto Discharge Function |
External Driver | External Output Driver Transistor |
Technical Documents
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SPICE model download
You can download the product's SPICE model. Login/registration to myNISD is required to download.
Partner Board Qualifications (Lattice Semiconductor)
Nisshinbo Micro Devices parts are officially registered in reference design of Lattice FPGA system.
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Typical Application
CIN, COUT: 1.0 µF or more
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RP115H181x Dropout Voltage vs. Output Current
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RP115L181x Dropout Voltage vs. Output Current
Quality & Packages
Product Name | Compatibility | Package | Marking | Reliability |
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RP115Lxx1x-E2 |
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DFN1216-8 | See datasheet | RP115L |
RP115Hxx1x-T1-FE |
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SOT-89-5 | See datasheet | RP115H-FE |
RP115Lxx1x-E2-Y |
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DFN1216-8 | See datasheet | RP115L-Y |
RP115Hxx1x-T1-YE |
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SOT-89-5 | See datasheet | RP115H-YE |
RP115Lxx2x-TR-A |
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DFN2020-8B | See datasheet | RP115L-A |
RP115Hxx1x-T1-AE |
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SOT-89-5 | See datasheet | RP115H-AE |
- Refer to the datasheets for the details on the product.
- The package file or the datasheet includes package dimensions, taping specifications, taping reels dimensions, power dissipations, and recommended land pattern.