What is the difference between EOS and ESD?
What is the difference between EOS and ESD?
Common
EOS refers to electrical stress that exceeds a circuit's withstand voltage, while ESD refers to the event where electrical energy is discharged.
- EOS: Electrical Overstress
- ESD: Electro Static Discharge
While circuit damage caused by ESD is sometimes classified as one factor contributing to EOS in a broad sense, from the perspective of circuit protection, EOS as described below and ESD are generally distinguished.
| ESD: Electro Static Discharge | EOS: Electrical Overstress | |
| Tolerance | Please refer to the reliability data on our website product pages for the tolerance levels of each product. | Please refer to the absolute maximum ratings in the product datasheets on our website. |
| Source | Human Body Model (HBM), Charged Device Model (CDM), instantaneous discharge of accumulated electrostatic charge, etc. |
Power spikes, induced surges, latch-up, power supply missequencing or hot-plugging, circuit shorts caused by conductors, etc. |
| Waveform | Generally, steep rise/fall times on the order of nanoseconds | Milliseconds to seconds in duration, relatively long-lasting; waveform varies depending on environment and system |
| Energy quantity | Generally, the limited energy stored in capacitance ranging from several µJ to several mJ. | Due to the prolonged duration, the total energy is greater even at the same voltage and current, generating excessive thermal stress. |
| Damage pattern | Minor leaks associated with localized oxide film pinholes or metal damage | Thermal burn damage across the entire chip or multiple pins, metal damage, silicon melting, etc. *However, at low energy levels, damage patterns similar to ESD may also occur. |
| Reproducibility | The discharge waveform is modeled, but its reproducibility is low because it depends on the charge level prior to discharge. | In some cases, high reproducibility may occur depending on the cause device, circuit, or operating conditions. |
| Examples of countermeasures | - ESD protection devices - EPA (Electrostatic Precaution Area) management - Antistatic wrist straps, ionizers |
- TVS diodes and fuses for overvoltage absorption - Ferrite beads, snubber circuits - First-mate, last-break design |
| Distinguishing during analysis* | Localized cracks, pinholes, and presence of metal melting -> Microscopic examination after location identification via OBIRCH/EMS analysis |
Presence of burn damage at multiple locations/over a wide area on the chip surface -> In most cases, this can be determined by observing the chip's appearance (under a microscope) after resin removal. |
- *In cases of destructive failure, it is difficult to determine solely from the analysis results whether the cause is ESD or the specific EOS mentioned above.
If damage is confirmed, please verify whether any elements capable of applying electrical stress similar to those listed above (under “Source”) exist within your operating environment.